Recently, in fabricating a conventional TFT LCD, generally a five-mask method is applied to an array process for fabricating array substrates, and partially a four-mask method is applied. A gray tone mask has been employed to etch a source/drain metal layer and an active layer in a channel portion of a TFT in the four-mask method.
The process for such conventional four-mask method comprises the following processes.
Firstly, a gate layer is formed by a conventional gate process, and then a gate insulating layer is deposited.
Secondly, a semiconductor active layer, a doped layer, and a source/drain metal layer are deposited. A gray tone photoresist pattern can be formed with a gray tone mask so as to form an island of a TFT by etching. An ashing process is performed to partially remove the photoresist pattern and thus expose the channel portion. Then the metal layer, the doped layer, and the active layer in the channel portion are etched successively with the residual photoresist pattern. In this process, it is desired to strictly control the gray tone photoresist pattern in the channel portion. In addition, both the selective ratio and the uniformity in the etching are highly required. Therefore, there is required a strict process tolerance,